1. Field
Exemplary embodiments of the present disclosure relate to a gain error correction scheme in an analog-to-digital converter.
2. Description of the Related Art
Analog-to-digital converter (ADC) system such as a successive-approximation-resister (SAR) ADC and a sigma-delta ADC may be used in many modern system-on-chip (SOC) designed. However, such type of ADC may have a gain error due to several factors.